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HomeIoTThe Tiny iCESugar-nano Packs an FPGA, RISC-V Core, and iCELink Right into...

The Tiny iCESugar-nano Packs an FPGA, RISC-V Core, and iCELink Right into a Compact Footprint

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Muse Lab has launched a brand new entry in its iCESugar household of open supply field-programmable gate array (FPGA) improvement boards, the compact iCESugar-nano — powered by a Lattice Semiconductor iCE40LP1k and a RISC-V core.

“iCESugar-nano is an open supply FPGA improvement board primarily based on Lattice iCE40LP1k-CM36 designed and made by Muse Lab,” the corporate explains of its new {hardware}. “It is totally supported by the open supply toolchain (yosys & nextpnr & icestorm).”

The compact board options three PMOD connectors, which serve to interrupt out all of the accessible enter/output (IO) pins on the FPGA. An iCELink debugger, primarily based on Arm’s Mbed DAPLink, for debugging and drag-and-drop programming — making set up of a brand new bitstream so simple as utilizing a USB flash drive.

“Apart from,” Muse Lab provides, “the iCELink gives a adjustable clock to FPGA and a further USB CDC serial port direct connecting to FPGA. Simply with one [USB] Sort-C cable, you can begin to develop and check the board.”

The FPGA on the coronary heart of the iCESugar-nano has 1,280 look-up tables (LUTs), 8kB of static RAM (SRAM), and a phase-locked loop (PLL). The 14 general-purpose enter/output (GPIO) pins are introduced out to 2 6-pin PMOD headers at both aspect of the board and one 12-pin header on the finish, reverse the USB Sort-C connector for information and energy. For extra storage, there is a 2MB SPI flash chip on-board.

The board is obtainable to order on the Muse Lab Tindie retailer now, at $19; schematics and supply code can be found on the undertaking’s GitHub repository underneath an unspecified open supply license.

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