Be part of Azure on the Design Automation Convention (DAC) | Azure Weblog and Updates

The Azure Excessive-Efficiency Computing (HPC) answer allows consultants in silicon design by offering them the infrastructure and instruments for chip design, IP design, silicon manufacturing, and silicon provide chain. Creating cutting-edge applied sciences requires excessive quantities of compute energy, and as our prospects face further distinctive threats and challenges made worse by the pandemic, the Azure cloud can clear up many of those by offering a safe, scalable platform that was constructed for HPC. Clients are more and more utilizing the Azure HPC platform to spice up productiveness, optimize sources, pace up time to market, and improve resourcing. AMD for instance is utilizing the Azure platform together with the HBv3 digital machines to attain higher high quality designs, pace up time to market, and improve capability by bursting to the cloud.

We just lately introduced a preview for Azure HBv3 digital machines enhanced by third Gen AMD EPYC^TM processors with 3D V-cache, codenamed “Milan-X.” These enhancements proceed us on the trail to changing into the perfect platform on this planet for silicon design, by bettering the efficiency, scaling effectivity, and cost-effectiveness of a wide range of reminiscence performance-bound workloads like RTL simulation workloads. Clients utilizing Milan-X will expertise as much as 60 p.c greater efficiency for RTL simulation, and the improve might be supplied at zero price past present HBv3-series VMs, and with no adjustments required of buyer workloads. As well as, all HBv3-series VMs globally will quickly be upgraded with Milan-X processors. For extra info, learn the announcement and in-depth efficiency content material.

In June, we introduced the basic availability of the FX-series digital machines, powered by 2nd Era Intel Xeon Scalable Processors. Designed for workloads demanding very excessive single-threaded and flippantly threaded efficiency, these are perfect for Digital Design Automation (EDA). The brand new FX-series digital machines ship as much as a 19 p.c higher efficiency over FSv2-series digital machines, with 1008 GB of RAM (42 GB per bodily core), 2 TB of hooked up NVMe SSD, a single-core frequency of 4.1 GHz, a base frequency of three.4 GHz, and an all-core-turbo frequency of 4.0 GHz. Moreover, prospects needing further per-CPU core efficiency can flip off hyper-threading. Learn further details about the FX-series digital machines.

We might be on the Design Automation Convention (DAC) in particular person and might’t wait to see you there.

Periods you don’t need to miss

SKYTalk

Monday, December 6 | 1:00 PM Pacific Time (PT)

William Chappel, Azure International

Semiconductors are deeply embedded in each side of our lives, and up to date safety threats and world provide chain challenges have put a highlight on the trade. Vital investments are being made each by nation states and industrial trade to handle provide chain dependencies, guarantee integrity, and construct safe, collaborative environments to foster progress. These shifts present distinctive alternatives for our trade. This discuss blends insights and experiences from authorities initiatives and Azure’s Particular Capabilities and Infrastructure applications, to stipulate how cloud and AI applied sciences, together with device distributors, fabless semiconductor firms, IP suppliers, foundries, gear producers, and different ecosystem stakeholders can contribute to constructing a strong, end-to-end, safe silicon provide chain for each industrial and authorities purposes, whereas producing worth for his or her companies.

Design/IP/Embedded Monitor (DIET)

Monday, December 6 | 10:30 AM Pacific Time (PT)

Moderator: Preeth Chengappa, Sr. Director, Semi and EDA, Azure International

Business panel: Prashant Varshney, Head of Product, Silicon, Azure International; Phillip Steinke, Fellow, CAD Infrastructure and Bodily Design, AMD; Michael Hale, Senior Infrastructure Structure, NVIDIA; Derek Magill, CEO and Co-Founding father of License Foundry and HPC Options Architect at Flux7; Sridhar Panchapakesan, Program Administration Director for Cloud Engagements, Synopsys.

Be part of us for a reside panel as consultants from Microsoft, NVIDIA, Synopsys, License Foundry, and Flux7 talk about the actual benefits and challenges of working chip design within the cloud.

Design on Cloud Theater—Azure

Tuesday, December 7 | 10:30 AM Pacific Time (PT)

Find out how Microsoft Azure’s silicon group is utilizing Azure to allow its semiconductor improvement. We’ll cowl how the workforce makes use of Azure DevOps capabilities, together with GIT, to handle design info and leverage Azure HPC to run their EDA workloads.

On the sales space

Go to us at our sales space within the Design Infrastructure Alley to fulfill consultants from Microsoft, AMD, and Pure Storage. Try the newest Azure HBv3 and Pure Storage FlashBlade {hardware} at our {hardware} exhibit.

Be part of us for some bite-sized classes at our mini-theater that includes audio system from prospects and trade companions together with AMD, ANSYS, Cadence, Pure Storage, Rescale, Siemens EDA, and Synopsys.

How our prospects are utilizing Azure

AMD IT satisfies an insatiable urge for food for capability, scalability, and innovation with Azure HPC

As a pacesetter in semiconductor, laptop processors, and associated applied sciences, AMD has a duty to serve its prospects, maintain tempo with the trade, and assist set the usual for a way servers, computer systems, and embedded methods run. To keep up its execution observe document, the IT workforce at AMD used Microsoft Azure high-performance computing (HPC), HBv3 digital machines, and different Azure sources to construct scalable capability and optimize the corporate’s cloud capabilities, accelerating time to market and eliminating weeks and even months of delay.

Don’t miss the video taking part in on the Microsoft Azure sales space.

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